Reading time ( words)
Averatek is pleased to announce that Gus Karavakis, Director of Advanced Process Development, will present “Thermal Stress Reliability of Stacked Microvias Fabricated with a Liquid Metal Ink Semi-Additive Process” at the IPC APEX Expo Technical Conference, January 24-26, 2023 in San Diego Congress Center. The technical paper was co-authored by Mike Carano, chairman of the IPC Technology Roadmap committee and board member.
The drive for miniaturization makes the small footprint of stacked vias more desirable in terms of routing and design efficiency than staggered vias. However, there is evidence that stacked vias are prone to latent failure after exposure to thermal stress from the reflow processes of conventional surface mount technology (SMT). This problem is broadly defined as a weak interface between the plated copper and the blind via the target pad. If thermally stressed, the generally weak interface will fail, especially during forced convection assembly backflow.
While many studies on microvia interfacial fracture have focused on conventional chemical copper as the plated through-hole (PTH) choice, no recent studies have measured the reliability of stacked microvias with a semi-additive process (SAP) using a metal ink liquid as a catalytic layer.
This new catalytic ink promotes an ultra-thin, adherent chemical copper deposit. The lower thickness allows for much finer line gaps and stroke widths than traditional subtractive or semi-additively modified etching (mSAP) processes. Liquid metal ink technology allows for the capability of 5 micron lines and gaps; tighter line width control will benefit impedance control.
To measure the reliability of the liquid metal ink process, test vehicles were built and subjected to thermal shock and thermal stress tests, according to the IPC-TM-650 2.6.27B test method protocols. The full results of this study will be covered in the presentation.
Test results indicate that the liquid metal ink process provides long-term reliability on two-stack blind ways, while offering distinct functionality advantages over traditional subtractive and mSAP processes.
Gus Karavakis has over 30 years of industry experience, with special expertise in advanced processes, additive technologies, IC packaging and substrates, manufacturing and flexible and rigid PCB materials. He authored/co-authored over 80 patents and holds a BE in Chemical Engineering from CCNY with an MS in Chemical Engineering from Columbia University.
Dip tin is well accepted as a high reliability final finish in the industry. Thanks to its excellent corrosion resistance, it has important market shares, especially in the automotive industry. During the welding process, an intermetallic compound (IMC) is formed between copper and tin. A remaining concern in the industry is the potential impact of IMC on the weldability of the final finish. In this article, typical failure modes in dip soldering are described and related to potential root causes of defects.
Candor Industries is a PCB manufacturer investing in UHDI fabrication capabilities in Canada. To support advanced packaging, as the current pace of the IC process slows down, PCB fabrication capabilities need to shrink to keep up. Sunny Patel, Technical Sales Manager at Candor, updates us on what Candor has learned in its journey to add UHDI. What we take away from this interview is that while certainly not insignificant, the stretch to add UHDI may not be as far off as one might think.
During a recent tour of the MKS facility in Beaverton, Oregon, I met Todd Templeton, Chris Ryder, Kyle Baker and Martin Orrick. As a reminder, MKS acquired ESI in 2019 and kept the ESI brand. In this interview, they explain their approach to HDI and ultra HDI, the current state of the base materials, and what the cutting-edge future of technology looks like.